Quantization Error in ADCs Explained (With Examples)

Analog-to-Digital Converters (ADCs) map continuous signals into discrete digital values. This process introduces an unavoidable error known as quantization error. Understanding it is key to evaluating ADC accuracy and is a common interview topic.

What is Quantization Error?

Definition: Quantization error is the difference between the actual analog input and the nearest digital output level chosen by the ADC.

Since an ADC has finite resolution (N bits), the analog range is divided into 2N discrete steps. The maximum error is ±0.5 LSB.

Formula for Quantization Error

If VFS is the full-scale voltage and N is the number of bits:

LSB size = V_FS / 2^N

Quantization Error (max) = ±0.5 × LSB

Example Calculation

Consider a 3-bit ADC with full-scale = 8 V.

• Number of levels = 2³ = 8
• LSB size = 8 V / 8 = 1 V
• Quantization error = ±0.5 V

Meaning: For any input, the ADC output can be off by up to 0.5 V.

Quantization Error and SNR

The Signal-to-Quantization-Noise Ratio (SQNR) is often used to evaluate ADC quality. For an N-bit ideal ADC:

SQNR (dB) ≈ 6.02 × N + 1.76

Example: For a 10-bit ADC → SQNR ≈ 61.96 dB.

Practical Insights

• Higher resolution (more bits) → lower quantization error.
• Dithering can reduce quantization distortion.
• Non-ideal ADCs may have higher errors due to INL/DNL in addition to quantization.

Interview Question

Q: What is the maximum quantization error of an N-bit ADC?
A: ±0.5 LSB.

Conclusion

Quantization error sets the fundamental accuracy limit of an ADC. Understanding it helps engineers balance resolution, noise, and performance in mixed-signal systems.